ads关于IQ信号的仿真

by Andy Howard, Applications Engineer

Agilent EEsof EDA

Introduction

This article covers an Agilent EEsof ADS example that shows the simulation of a direct-conversion, transistor-level I-Q modulator. Included are differential-mode mixers, a combiner, abuffer, and a power amplifier. Many simulations of the sub-circuits as well as the modulator areincluded: Amplifier gain compression, load pull, ac frequency responses, mixer intermodulationdistortion as a function of various swept parameters, modulator amplitude and phase accuracy,simulations with CDMA baseband data sources, and others. Many of the simulations would bealmost impossible to complete with a purely time-domain simulator such as SPICE.

The design has not been fabricated, and is instead used as an example to show simulation

capabilities. The time has not been taken to extensively optimize this design by reducing powerconsumption, minimizing bias voltages, etc., although the various simulation set-ups could beused to improve the design. Also, bias circuitry has not been included.

A number of different simulations have been run on each of the different parts of the modulator,as well as simulations on the parts combined together. Our assumption was that a designer wouldnot just throw the entire modulator together at once, and that there would be shortcomings thatwould be improved more easily by simulating one part of the modulator at a time.The I-Q modulator design

I-Q (In Phase-Quadrature), or vector, modulators are commonly-used integrated circuits inmodern communications equipment. These modulators operate by taking two baseband datasequences (I and Q channels) and varying the amplitude and phase of a sinusoidal carrier signalin response to the instantaneous I and Q channel voltages (Refs. 1 and 2.) Designers of these ICsmust be concerned with the specific performance characteristics of modulation accuracy,

dynamic range, frequency response, undesired leakage and intermodulation distortion, as well asmore general characteristics like power consumption, efficiency, and output power.

In the example direct-conversion I-Q modulator, a 960-MHz LO signal is directly modulated bybaseband I and Q data signals. The modulator consists of a mixer, a combiner, a buffer, whichalso converts a differential-mode signal into a single-ended signal, and a power amplifier. A 960-MHz 90-degree phase shifter has not been included. Instead, ideal LO signals are generated bythe simulator. Simulations are also run with amplitude and phase imbalances to see their effects.The specific design for this modulator is shown in Fig. 1.

Fig. 1: I-Q Modulator: Mixer, Combiner, Differential-Input Buffer & Power AmplifierA number of different simulations have been run on each of the different parts of the modulator,and on the combined parts. Simulations of each part of the modulator are described below,starting with the power amplifier output stage and progressing “backward” through the circuit.Power amplifier

The power amplifier (low power output buffer) takes a voltage input and converts it to a current,required to drive an off-chip large-signal amplifier for higher output powers. The topologyconsists of an emitter-follower stage driving three emitter-followers in parallel (Fig. 2.)

Fig. 2: Schematic Of The Power Amplifier

To begin, an S-parameter simulation of the devices used in the amplifier verifies that they willprovide gain at the desired operating frequency. However, S-parameter analysis is linear onlyand does not provide distortion or output power information.

A simulation of the dc input-output transfer curve of the amplifier (Fig. 3) helps select the bestbias voltage for the input signal, to get the maximum dynamic range without clipping. This willnot provide the maximum efficiency, but for modulation formats that include both amplitude andphase minimizing distortion is more important than dc power consumption (at this low power.)The markers (Fig. 3, again) are used to calculate the optimal input bias point, although this mightrequire modification if the previous stage is unable to output the 5-V rail voltage.

Fig. 3: The Amplifier’s Dc Transfer Curve, With Open-Circuit Output

To evaluate the output power, dc-to-RF efficiency, and 3rd- and 5th-order intermodulationdistortion versus load impedance, a load-pull simulation was run at one bias point. In thissimulation, a circular region of the Smith chart is specified, with load impedances within thisregion presented to the output of the amplifier (Fig. 4.) The dc-to-RF efficiency can be increasedsomewhat by driving the amplifier with a larger input signal, but at the expense of increaseddistortion.

Fig. 4: Simulation Results For Dc-To-RF Efficiency/Delivered Power Contours

Fig. 5 shows the simulated load impedances, output spectrum, intermodulation distortion andoutput waveform for two-tone load-pull simulation. Using this data with the contours of Fig. 4,you can quickly determine how changes in the load impedance affect the output power,

efficiency, and level of intermodulation distortion products, as well as the shape of the outputwaveform.

Fig. 5: Outputs From The Two-Tone Load-Pull Simulation

The Power Amplifier DesignGuide in ADS was then used to determine component values for asimple series-L, shunt-C, series-C matching network that presents the desired load impedance tothe amplifier at 960 MHz. A swept amplitude simulation was run to evaluate output powercompression, intermodulation distortion and output waveforms vs. the amplitude of the inputsignal. Fig. 6 shows the simulation setup.

Fig. 6: Simulation Setup For Amplifier Output Power Compression

And Intermodulation Distortion

The results of the simulation are shown in Fig. 7 with the output power, efficiency, and

intermodulation distortion characteristics, all as a function of input signal amplitude. From theseplots and the columns of listed data, you can quickly determine the level of distortion producedby the circuit for a given input signal level.

Fig. 7: Output Power Compression And Intermodulation Distortion Simulation ResultsOne additional characterization test, a one-tone simulation, was run with a sweep of two

parameters: The emitter resistor in each of the three parallel output stages (which sets the biascurrent); and the input bias voltage. Of course, other parameters could be swept to determineperformance improvements or identify sensitivities. The results of this simulation are shown inFig. 8, which shows the trade-offs that can be made between output power, dc-to-RF powerefficiency and dc bias current consumption. These plots also show the flexibility in ADS forpresenting data, making it easier for designers to evaluate trade-offs and optimize designs.

Fig. 8: Amplifier Output Power And Dc-To-RF Efficiency Vs. Input Bias Voltage

And Output Stage Emitter Bias Resistor ValueDifferential Input To Single-Ended Output Buffer

Fig. 9: Differential- And Common-Mode Gain Simulation

The differential input to single-ended output buffer is required because the baseband circuitsoperate in the differential-mode, while the output amplifier is single-ended. The simulations ofthis circuit include the dc transfer characteristic, along with differential- and common-modesmall-signal gains and common-mode rejection ratio versus frequency.

The setup for simulating both the common- and differential-mode gains is shown in Fig. 9. Thevariable “ph” is set to two values, 0 and 180, which changes the polarity of one of the input

signals and allows both common- and differential-mode gains to be simulated from one set-up.Fig. 10 shows the simulation results.

Fig. 10: Differential Input To Single-Ended Output Simulation Results

Combiner

This circuit combines the two differential-mode input signals from the mixers into a differential-mode output signal. Like the differential-to-single ended converter, the simulations of this circuitinclude the dc transfer characteristics, as well as the differential- and common-mode small-signalgains and the common-mode rejection ratio, vs. frequency.Mixers

Two differential-mode mixers, similar to Gilbert cells, are used to directly modulate the twoquadrature LO signals with the baseband I- and Q-modulation waveforms. The diagram of thetwo mixers is shown in Fig. 11. Although the schematic is too small to see the details, it showsthe topology that was used.

Fig. 11: ADS Schematic Of The Two Identical Mixers, Which Include A Total Of 48 BJTsBecause they perform frequency conversion, characterizing mixer performance is more complexthan it is for circuits like amplifiers. Our first characterization is of the conversion gain, plussecond- and third-order intermodulation distortion vs. baseband signal amplitude. The simulationsetup is shown in Fig. 12.

Fig. 12: Simulation Setup For Mixer Conversion Gain And Intermodulation DistortionIn the mixer simulation, the 960-MHz LO signal is modeled as a pulse waveform. Two basebandsignals are defined, spaced 20 kHz apart and centered at 1 MHz, although these frequencies maybe set arbitrarily without affecting simulation performance, a flexibility that is not possible withsome time-domain based simulators. The amplitudes of the two baseband signals are swept from5 mV to 35 mV. Fig. 13 shows the simulated output spectrum over narrow and wider frequencyranges.

Fig. 13: The Simulated Mixer Output Spectrum For One Input Signal Amplitude, ShownIn Two Frequency Ranges. These Spectra Are Updated When The Marker Is Moved

Fig. 14: Simulation Results For Mixer Conversion GainAnd Intermodulation Distortion Vs. Baseband Signal Amplitude

Additional simulation results (Fig. 14) indicate that the conversion gain starts to decrease as theinput signal amplitude is increased towards 35 mV, and that the intermodulation distortion levelrises, both as expected. Although not included here second-order intermodulation distortioncalculations are provided in the example file.

Simulations were also run to characterize the mixer’s performance vs. LO signal amplitude andbaseband signal frequency, with some of the results shown in Fig. 15. These simulations help todetermine the optimal baseband and LO signal amplitudes, as well as ensure that the frequencyresponse of the mixer will not distort the modulation signal.

Fig. 15: Mixer Conversion Gain/Intermodulation Distortion Vs. LO Signal AmplitudeSimulating The Entire Modulator

After simulating each element individually, the next step is to simulate the performance of theentire modulator. Ideally, the output signal should be proportional to,

I(t)*sin(ωct)+Q(t)*cos(ωct),

where I(t) and Q(t) are the baseband modulation signals and ωc is the carrier, which is also theLO frequency in a direct-conversion modulator. By applying different I and Q baseband signals,you can characterize the modulator’s accuracy, intermodulation distortion, error-vectormagnitude, output power compression, LO leakage and other performance factors.

If the baseband modulation signals are sinusoids with a phase difference of 90 degrees,

I(t)=Vbb*sin(ωmt) and Q(t)=Vbb*cos(ωmt),

then an x-y plot of the Q signal on the y-axis versus the I signal on the x-axis creates a circle.When these signals are applied to the I-Q modulator, the trajectory diagram (envelope of themodulated carrier) should also trace a circle of constant amplitude and constant rate of phasechange. Any deviation from this ideal response is due to distortion or mismatches in the

modulator, or amplitude and phase imbalances in the LO. The simulation can use ideal LOsignals, or include LO amplitude and phase imbalances and see their effects on the modulator’sperformance. The ADS Circuit Envelope simulator is particularly well suited for this type ofsimulation.

Fig. 16 shows a setup for simulating the single-sideband modulator output versus basebandsignal amplitude. In this example, a 3-degree phase error and 5 percent magnitude error havebeen introduced, creating non-ideal LO signals. The baseband signal amplitude has been sweptfrom 1 mV to 30 mV.

Fig. 16: Simulation Setup: Modulator Output (SSB Case) Vs. Baseband Signal AmplitudeSome of the simulation results are shown in Fig. 17. The output spectrum with baseband signalamplitudes of 30 mV is shown, which may be updated for different input signal levels by movinga marker. The upper sideband signal level and the highest intermodulation distortion term versusinput signal amplitude are also shown.

Fig. 17: A Portion Of The SSB Simulation Results

Fig. 18 shows the variation in signal amplitude and phase error at the output and two other pointswithin the modulator. These errors will vary somewhat with baseband signal magnitude.

Fig. 18: I-Q Modulator Magnitude And Phase Error Simulation Results

If the baseband modulation signals are in-phase sinusoids,

I(t)=Vbb*cos(ωmt) and Q(t)=Vbb*cos(ωmt),

then the resulting output spectrum will be double sideband, centered on the LO frequency. Fig.19 shows some of the simulation results, including the output spectrum when the baseband signalamplitudes are 10 mV, the upper sideband signal level and the highest intermodulation distortionterm vs. input signal amplitude.

Fig. 19: Double-Sideband Output Spectrum, Plus The Output Power Of One OfThe Fundamental Tones And One Of The Intermodulation Distortion Terms

Vs. Input Signal AmplitudeFinally, the modulator was simulated with baseband signals corresponding to various modulationformats, such as π/4 DQPSK and CDMA. Fig. 20 shows the modulator’s output spectrum, outputpower, and adjacent-channel power levels, with baseband I and Q signals corresponding to theNADC π /4 DQPSK modulation format.

Fig. 20: Modulator Output Spectrum, Output Power, And Adjacent-Channel Power

Levels, With NADC π/4 DQPSK Modulation Baseband I And Q SignalsFig. 21 shows the output trajectory and constellation diagrams, the error vector magnitude

(EVM) in volts versus time, plus a readout of the percent EVM. This simulation was with no LOamplitude or phase imbalance. Arbitrary values of these imbalances can be introduced toevaluate the EVM degradation.

Fig. 21: Output Trajectory, Constellation Diagrams, And Error Vector Magnitude DataFig. 22 shows the same simulation results as Fig. 21, but with a 3 percent LO phase imbalanceand a 5 percent LO amplitude imbalance. The trajectory diagram shows increased distortion andthe error vector magnitude is higher, as expected.

Fig. 22: Output Trajectory, Constellation Diagrams And Error Vector Magnitude Data,

With LO Phase And Amplitude Imbalance Effects IncludedI and Q modulation signals may use any baseband time-domain data. A simulation was run withbaseband signals corresponding to the IS-95 CDMA specification. The resulting spectrum,

output power, and ACPR for one baseband signal amplitude scaling factor are shown in Fig. 23,with results for a scaling factor five times as high shown in Fig. 24. There is a noticeable trade-off between output signal power and ACPR.

Fig. 23: Output Spectrum, Main Channel Power, And ACPRs

With A Baseband CDMA Signal

Fig. 24: Output Spectrum, Main Channel Power, And ACPRs With A Baseband CDMA

Signal At Five Times The Amplitude Of The Signal Used In Fig. 23Summary

The design process for I-Q modulators requires many advanced simulation tools, as well as

highly flexible methods of displaying the results. This paper has shown the wide range, and oftenunique, simulation and data display capabilities in the Advanced Design System that allowefficient, accurate simulation and characterization of I-Q modulators and their sub-circuits. Formore information on ADS, or this application, visit www.agilent.com/find/eesof.References

1. Jim Wholey “Vector Modulator ICs for Use in Wireless Communications,” Proceedings of RFExpo West, 1993, pp. 232-240.

2. “Digital Modulation in Communication Systems – An Introduction,” Hewlett-PackardApplication Note 1298, 1997.

3. The ADS IQ modulator example discussed in this article may downloaded from the AgilentWeb site: http://contact.tm.agilent.com/tmo/eesof/applications/latest.html The file name isIQ_Mod_from_MDS_prj.zap.Author’s Bio

Andy Howard joined HP in 1985, as a development engineer designing microwave circuits. Hespent a year in Japan as a systems engineer before becoming an HP EEsof applications engineerin 1993. His applications work has included simulating noise in nonlinear circuits, high-yielddesign techniques (design of experiments), circuit envelope applications and, for the past fouryears, Agilent ADS examples. He developed the ADS Power Amplifier DesignGuide, and alsoworked on the Mixer DesignGuide. Earlier this year he designed a high-speed prescaler IC usingAgilent’s RFIC Dynamic Link. He earned a BSEE and MSEE from U.C. Berkeley and was avisiting researcher at NEC's Central Research Labs in Japan while a graduate student. He isfluent in Japanese.